Field
The present disclosure relates generally to power reduction, and more particularly, to memory power reduction.
Background
Dynamic random access memory (DRAM) is a volatile memory that consumes power even when inactive because stored information must be refreshed periodically. Non-volatile random access memory (NVRAM) such as magnetoresistive random-access memory (MRAM), phase-change random-access memory (PRAM), resistive random-access memory (RRAM), ferroelectric random-access memory (FeRAM), or nano-random-access memory (NRAM) consumes less power than DRAM when inactive, but more power than DRAM when active. Methods and apparatus are needed in association with DRAM and NVRAM with respect to power reduction within a system on a chip (SoC)/integrated circuit (IC) that utilizes such memory elements.